Exercise3-28 <---> Exercise3-30
Exercise 3.29
Exercise 3.29. Another way to construct an or-gate is as a compound digital logic device, built from and-gates and inverters. Define a procedure or-gate that accomplishes this. What is the delay time of the or-gate in terms of and-gate-delay and inverter-delay?
Scheme solution:
(define (or-gate s1 s2 output)
(let ((a (make-wire))
(b (make-wire))
(c (make-wire)))
(inverter s1 a)
(inverter s2 b)
(and a b c)
(inverter c output))
'ok)
The delay is (2 * inverter-delay + and-gate-delay)
Exercise3-28 <---> Exercise3-30